1. Field of the Invention
The present invention relates to a variable gain amplifier whose gain is variable, and also to a communication apparatus including therein the amplifier.
2. Description of Related Art
A conventional communication apparatus for, for example, transmitting/receiving television broadcasting signals, includes therein a variable gain amplifier constructed so that its gain is variable. For example, a receiving circuit of the communication apparatus includes therein a low noise amplifier (LNA), as a variable gain amplifier, for amplifying radio frequency (RF) signals received through an antenna.
When a target wave received is weak, the gain of the LNA is set to a large value so that the influence of noise to be generated in each circuit can be suppressed as much as possible and thereby high sensitivity of reception can be obtained. Contrastingly, when an interfering wave exists or the target wave is high in intensity, the gain of the LNA is set to a small value so that a circuit on a subsequent stage, such as a frequency converter, can be prevented from being saturated. For this purpose, the LNA requires a wide range of gain variation, for example, about 30 to 40 dB. Further, in a reception environment in which an interfering wave exists though the target wave is weak, the LNA requires high linearity to suppress the influence of distortion to be generated due to the interfering wave.
The linearity of a general receiving circuit in which a plurality of circuits including the LNA and a mixer, a filter, etc., on the subsequent stages, are in a cascade arrangement, for example, see FIG. 1 in relation to an embodiment of the present invention, is given by the following Expression 1 using IIP3, which is the third-order intermodulation intercept point as an index of linearity.
                              1                      IIP            ⁢                                                  ⁢            3                          =                              1                          IIP              ⁢                                                          ⁢                              3                1                                              +                                    G              1                                      IIP              ⁢                                                          ⁢                              3                2                                              +                                                    G                1                            ·                              G                2                                                    IIP              ⁢                                                          ⁢                              3                3                                              +          …          ⁢                                          +                                                    ∏                                  j                  =                  1                                                  n                  -                  1                                            ⁢                                                          ⁢                              G                j                                                    IIP              ⁢                                                          ⁢                              3                n                                                                        [                  Expression          ⁢                                          ⁢          1                ]            
In the Expression 1, G1, G2, . . . , and IIP31, IIP32, represent the respective gain and IIP3 of each of the plurality of circuits, including the LNA, and the mixer, filter, etc., in the cascade arrangement. As apparent from the Expression 1, IIP3 of the whole of the receiving circuit is improved as the linearity IIP31 of the LNA as the first circuit in the receiving circuit increases or the gain G1 of the LNA decreases. Therefore, to keep the linearity of the whole of the receiving circuit high, it is desired that the linearity of the LNA itself does not decrease when the gain of the LNA is gradually decreased.
JP-A-2005-136846 discloses a variable gain amplifier suitable for such an LNA. The variable gain amplifier includes therein a plurality of bipolar transistors, as amplifying transistors, connected in parallel between signal input and output terminals. An attenuator is provided in each interval between the plurality of amplifying transistors so that a signal attenuated by the attenuator is input to the amplifying transistor on the subsequent stage. Further, the base currents of the plurality of amplifying transistors are continuously controlled so that the total of the currents is kept constant. Thus, a gain variation characteristic in which the gain varies smoothly over a wide range can be obtained by switching between the plurality of amplifying transistors different in gain to be obtained, and further by changing the supply current to each amplifying transistor.
In general, the linearity of a circuit is improved as the power consumption of the circuit increases. In the variable gain amplifier of JP-A-2005-136846, however, there is a transition region in which each transistor operates with a little base current because the distribution ratio of base currents changes continuously when the plurality of amplifying transistors are switched over. Thus, as shown in FIG. 4 of JP-A-2005-136846, in particular, when switching from the first-stage amplifying transistor to the second-stage amplifying transistor to decrease gain, the characteristic of the linearity IIP3 drops widely, that is, deteriorates, as the supply current to the first-stage amplifying transistor decreases.